LRS1383 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1383' PDF : 114 Pages View PDF
FUM00701
17
Applying the specified voltage on VCC and VPPH1/2 on
VPP enables successful block erase, full chip erase, (page
buffer) program or OTP program with writing the proper
command and address to the CUI. Erase or program
operation may occur in only one partition at a time. Other
partitions must be in one of the read modes.
The Block Erase command requires appropriate
command and an address within the block to be erased.
The Full Chip Erase command requires appropriate
command. The (Page Buffer) Program command requires
appropriate command and an address of the location to be
programmed. The Set/Clear Block Lock Bit or Set Block
Lock-down Bit command requires appropriate command
and an address within the target block. The OTP Program
command requires appropriate command and an address
of the location to be programmed within the OTP block.
The Set Read Configuration Register command or the Set
Partition Configuration Register command requires
appropriate command and configuration register code
presented on the addresses A0-A15.
The CUI itself does not occupy an addressable memory
location. When both CE# and WE# go VIL (valid), the
command is written to CUI and the address and data are
latched on the rising edge of CE# or WE#, whichever
goes high first. The command can be written to the CUI at
the standard microprocessor writing timing.
Appendix to Spec No.: MFM2-J13207 Model No.: LRS1383 March 1, 2001
Rev. 2.20
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