LRS1383 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LRS1383' PDF : 114 Pages View PDF
FUM00701
35
Bus
Operation
Command
Comments
Write
Page Buffer
Program
<First cycle>
Data=E8H
Addr=Start Address
Read
Extended Status Register
Data
Standby
Check XSR.7
1=Page Buffer Program
Ready
0=Page Buffer Program
Busy
Write
(Note 1)
<Second cycle>
Data=[Word Count N]-1
Addr=Start Address
Write
(Note 2, 3)
Write
(Note 4, 5)
Page Buffer
Program
<Third cycle>
Data=Buffer Data
Addr=Start Address
<(N+2)th cycle>
Data=Buffer Data
Addr=Sequential Address
following start address
Write
<(N+3)th cycle>
Data=D0H
Addr=Within Partition
Read
Status Register Data
Addr=Within Partition
Standby
Check SR.7
1=WSM Ready
0=WSM Busy
1. Word count values on DQ0-7 are loaded into count
register.
2. Write Buffer contents will be programmed at the start
address.
3. Align the start address on a Write Buffer boundary for
maximum programming performance.
4. The device aborts the Page Buffer Program command
if the current address is outside of the original block
address.
5. The Status Register indicates an “improper command
sequence” if the Page Buffer Program command is
aborted. Follow this with a Clear Status Register
command.
SR full status check can be done after each page buffer
program, or after a sequence of page buffer programs.
Write FFH after the last page buffer program operation
to place device in read array mode.
Figure 8.1. Automated Page Buffer Program Flowchart
Appendix to Spec No.: MFM2-J13207 Model No.: LRS1383 March 1, 2001
Rev. 2.20
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