LT3992EFE View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT3992EFE' PDF : 36 Pages View PDF
LT3992
Applications Information
When the SS pin voltage is below 110mV, the VC pin is
pulled low which disables switching. This allows the SS
pin to be used as an individual shutdown for each channel.
As the SS pin voltage rises above 110mV, the VC pin is
released and the output is regulated to the SS voltage.
When the SS pin voltage exceeds the internal 0.806V
reference, the output is regulated to the reference. The
SS pin voltage will continue to rise until it is clamped at
typically 2.15V.
In the event of a VIN1 undervoltage lockout, the soft-start
latch is set for both channels, triggering a full start-up
sequence. If a channel’s SHDN pin is driven below 1.32V,
its overvoltage lockout is enabled, or the internal die
temperature for its power switch exceeds its maximum
rating during normal operation, the soft-start latch is set
for that channel.
In addition, if the load exceeds the maximum output switch
current, the output will start to drop causing the VC pin
clamp to be activated. As long as the VC pin is clamped,
the SS pin will be discharged. As a result, the output will
be regulated to the highest voltage that the maximum
output current can support. For example, if a 6V output is
loaded by 1Ω the SS pin will drop to 0.46V, regulating the
output at 4.6V ( 4.6A • 1Ω ). Once the overload condition
is removed, the output will soft start from the temporary
voltage level to the normal regulation point.
Since the SS pin is clamped at typically 2.15V and has to
discharge to 0.806V before taking control of regulation,
momentary overload conditions will be tolerated without
a soft-start recovery. The typical time before the SS pin
takes control is:
tSS(CONTROL)
=
CSS •1.2V
0.9mA
Open-Collector Comparators
The CMPO pin is the open-collector output of an internal
comparator. The comparator compares the CMPI pin volt-
age to 90% of the reference voltage (0.72V) with 80mV
of hysteresis.
The CMPO pin has a typical sink capability of 250µA when
the CMPI pin is below the threshold and can withstand 60V
when the threshold is exceeded. The CMPO pin is active
(sink capability is reduced in shutdown and undervoltage
lockout mode) as long as the VIN1 pin voltage exceeds
typically 2.9V.
The comparators can be used to monitor input and output
voltages as well as die temperature. See the Typical Ap-
plications circuit collection for examples.
Output Tracking/Sequencing
Complex output tracking and sequencing between channels
can be implemented using the LT3992’s SS and CMPO
pins. Figure 14 shows several configurations for output
tracking/sequencing for a 3.3V and 1.8V application.
Independent soft-start for each channel is shown in Fig-
ure 14a. The output ramp time for each channel is set by
the soft-start capacitor as described in the soft-start section.
Ratiometric tracking is achieved in Figure 14b by con-
necting both SS pins together. In this configuration, the
SS pin source current is doubled (24µA) which must be
taken into account when calculating the output rise time.
By connecting a feedback network from VOUT1 to the SS2
pin with the same ratio that sets VOUT2 voltage, absolute
tracking shown in Figure 14c is implemented. The mini-
mum value of the top feedback resistor (R1) should be set
such that the SS pin can be driven all the way to ground
with 0.9mA of sink current when VOUT1 is at its regulated
voltage. In addition, a small VOUT2 voltage offset will be
present due to the SS2 12µA source current. This offset
can be corrected for by slightly reducing the value of R2.
Figure 14d illustrates output sequencing. When VOUT1 is
within 10% of its regulated voltage, CMPO1 releases the
SS2 soft-start pin allowing VOUT2 to soft-start. In this case
CMPO1 will be pulled up to 2V by the SS pin. If a greater
voltage is needed for CMPO1 logic, a pull-up resistor to
VOUT1 can be used. This will decrease the soft-start ramp
time and increase tolerance to momentary shorts.
If precise output ramp up and down is required, drive the
SS pins as shown in Figure 14e. The minimum value of
resistor (R3) should be set such that the SS pin can be
driven all the way to ground with 0.9mA of sink current
during power-up and fault conditions.
For more information www.linear.com/LT3992
3992fa
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