LT3992EFE View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LT3992EFE' PDF : 36 Pages View PDF
LT3992
Applications Information
For the LT3992 demo board using the TSSOP package,
the estimated junction temperature rise above ambient
temperature is found by:
TRISETSSOP ≈ 10•(PowerD1+PowerD2)+
12.3•(PowerIND1+Power IND2)+ 17.5•
( ) PowerCH1+PowerCH2
The estimated junction temperature rise above ambient
for the LT3992 QFN layout is:
TRISEQFN ≈ 8.5•(Power D1+Power D2)+
( ) 13•(Power IND1+Power IND2)+ 23•
PowerCH1 + PowerCH2
For example, the typical application circuits listed in Table 4
are used to calculate the individual power loss contribu-
tions in Table 5. Table 6 shows the estimated power loss
and junction temperature rise above ambient temperature.
Note that the larger TSSOP package demonstrates better
thermal performance than the compact QFN package on
the LT3992 demo circuit boards. For LT3992 applications
that favor thermal performance, the TSSOP package is
the preferred package option.
Table 4
VIN1 VIN2 fSW fSW VOUT1 IOUT1 VOUT2 IOUT2
APPLICATION (V) (V) CH1 CH2 (V) (A) (V) (A)
Front Page 48 12 400 1600 12 1.5 5 2
Back Page
48 48 300 300 5 2 3 2
Table 5
PD1 PD2 PL1 PL2 PCH1 PCH2
APPLICATION (W) (W) (W) (W) (W) (W)
Front Page
0.54 0.56 0.23 0.28 0.99 0.79
Back Page
0.88 0.92 0.28 0.2 0.95 0.91
Table 6
APPLICATION
Front Page
Back Page
PLOSS (W)
CALC MEAS
3.38 3.2
4.14 4.2
TRISE TSSOP (°C)
CALC MEAS
48.3 46.1
56.4 53.0
TRISE QFN (°C)
CALC MEAS
56.8 53.3
64.3 62.9
The power loss and temperature rise equations provided
in the Thermal Considerations section serve as a good
starting point for estimating the junction temperature
rise. However, the LT3992 is a very versatile converter.
The combination of independent input voltages, output
voltages, output currents, switching frequencies, and
package selections for the LT3992 dictate that no power
loss estimation scheme can accommodate every possible
operating condition. As such, it is absolutely necessary to
evaluate a converter’s performance at the bench.
The power dissipation in the other power components such
as boost diodes, input and output capacitors, inductor
core loss, and trace resistances cause additional copper
heating and can further increase what the IC sees as am-
bient temperature. See the LT1767 data sheet’s Thermal
Considerations section.
Die Temperature and Thermal Shutdown
The LT3992 TJ pin outputs a voltage proportional to the
internal junction temperature. The TJ pin typically outputs
250mV for 25°C and has a slope of 10mV/°C. Without the
aid of external circuitry, the TJ pin output is valid from 20°C
to 150°C (200mV to 1.5V) with a maximum load of 100µA.
Full Temperature Range Measurement
To extend the operating temperature range of the TJ out-
put below 20°C, connect a resistor from the TJ pin to a
negative supply as shown in Figure 20. The negative rail
voltage and TJ pin resistor may be calculated using the
following equations:
VNEG
≤
2
•
TEMP(MIN)°C
100
R1 ≤ | VNEG |
33µA
where:
TEMP(MIN)°C is the minimum temperature where a
valid TJ pin output is required.
VNEG = Regulated negative voltage supply.
For example:
TEMP(MIN)°C = –40°C
VNEG ≤ –0.8V
VNEG = –1, R1 ≤ |VNEG|/33µA = 30.2kΩ
For more information www.linear.com/LT3992
3992fa
27
Share Link: 
