LTC1709 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC1709
Linear Technology
'LTC1709' PDF : 28 Pages View PDF
LTC1709
APPLICATIO S I FOR ATIO
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure␣ 2. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency (see Efficiency Considerations). The maximum
switching frequency is approximately 310kHz.
2.5
2.0
1.5
1.0
0.5
0
120
170
220
270
320
OPERATING FREQUENCY (kHz)
1709 F02
Figure 2. Operating Frequency vs VPLLFLTR
Inductor Value Calculation and Output Ripple Current
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
MOSFET gate charge and transition losses increase di-
rectly with frequency. In addition to this basic tradeoff, the
effect of inductor value on ripple current and low current
operation must also be considered. The PolyPhase ap-
proach reduces both input and output ripple currents
while optimizing individual output stages to run at a lower
fundamental frequency, enhancing efficiency.
The inductor value has a direct effect on ripple current. The
inductor ripple current ∆IL per individual section, N,
decreases with higher inductance or frequency and in-
creases with higher VIN or VOUT:
∆IL
=
VOUT
fL
1−
VOUT
VIN
where f is the individual output stage operating frequency.
In a 2-phase converter, the net ripple current seen by the
output capacitor is much smaller than the individual
inductor ripple currents due to ripple cancellation. The
details on how to calculate the net output ripple current
can be found in Application Note 77.
Figure 3 shows the net ripple current seen by the output
capacitors for the 1- and 2- phase configurations. The
output ripple current is plotted for a fixed output voltage as
the duty factor is varied between 10% and 90% on the
x-axis. The output ripple current is normalized against the
inductor ripple current at zero duty factor. The graph can
be used in place of tedious calculations, simplifying the
design process.
Accepting larger values of ∆IL allows the use of low
inductances, but can result in higher output voltage ripple.
A reasonable starting point for setting ripple current is ∆IL
= 0.4(IOUT)/2, where IOUT is the total load current. Remem-
ber, the maximum ∆IL occurs at the maximum input
voltage. The individual inductor ripple currents are deter-
mined by the inductor, input and output voltages.
1.0
0.9
1-PHASE
2-PHASE
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
DUTY FACTOR (VOUT/VIN)
1709 F03
Figure 3. Normalized Output Ripple Current vs
Duty Factor [IRMS ≈ 0.3 (∆IO(P–P))]
Inductor Core Selection
Once the values for L1 and L2 are known, the type of
inductor must be selected. High efficiency converters
generally cannot afford the core loss found in low cost
powdered iron cores, forcing the use of more expensive
ferrite, molypermalloy, or Kool Mµ® cores. Actual core
loss is independent of core size for a fixed inductor value,
Kool Mµ is a registered trademark of Magnetics, Inc.
12
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