LTC1960 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1960' PDF : 28 Pages View PDF
LTC1960
OPERATION
Battery Charger Controller
The LTC1960 charger controller uses a constant off-time,
current mode step-down architecture. During normal
operation, the top MOSFET is turned on each cycle when
the oscillator sets the SR latch and turned off when the
main current comparator ICMP resets the SR latch. While
the top MOSFET is off, the bottom MOSFET is turned on
until either the inductor current reverses, as indicated by
current comparator IREV, or the beginning of the next
cycle. The oscillator uses the equation:
tOFF
=
1
fOSC
• (VDCIN − VCSN )
VDCIN
to set the bottom MOSFET on time. The peak inductor
current at which ICMP resets the SR latch is controlled
by the voltage on ITH. ITH is in turn controlled by several
loops, depending upon the situation at hand. The average
current control loop converts the voltage between CSP and
CSN to a representative current. Error amp CA2 compares
this current against the desired current requested by the
IDAC at the ISET pin and adjusts ITH until the IDAC value
is satisfied. The BAT1/BAT2 MUX provides the selected
battery voltage at CHGMON, which is divided down to the
VSET pin by the VDAC resistor divider and is used by error
amp EA to decrease ITH if the VSET voltage is above the 0.8V
reference. The amplifier CL1 monitors and limits the input
current, normally from the AC adapter, to a preset level
(100mV/RCL). At input current limit, CL1 will decrease the
ITH voltage and thus reduce battery charging current.
An overvoltage comparator, 0V, guards against transient
overshoots (>7%). In this case, the top MOSFET is turned
off until the overvoltage condition is cleared. This feature
is useful for batteries which “load dump” themselves by
opening their protection switch to perform functions such
as calibration or pulse mode charging.
Charging is inhibited for battery voltages below the mini-
mum charging threshold, VCHMIN. Charging is not inhibited
when the low current mode of the IDAC is selected.
The top MOSFET driver is powered from a floating boot-
strap capacitor CB. This capacitor is normally recharged
from VCC through an external diode when the top MOSFET
is turned off. A 2µF to 4.7µF capacitor across VCC to GND
is required to provide a low dynamic impedance to charge
the boost capacitor. It is also required for stability and
power-on reset purposes.
As VIN decreases towards the selected battery voltage,
the converter will attempt to turn on the top MOSFET
continuously (“dropout’’). A dropout timer detects this
condition and forces the top MOSFET to turn off, and the
bottom MOSFET on, for about 200ns at 40µs intervals to
recharge the bootstrap capacitor.
Charge MUX Switches
The equivalent circuit of a charge MUX switch driver is
shown in Figure 3. If the charger controller is not enabled,
the charge MUX drivers will drive the gate and source of
the series-connected MOSFETs to a low voltage and the
switch is off. When the charger controller is on, the charge
MUX driver will keep the MOSFETs off until the voltage at
CSN rises at least 35mV above the battery voltage. GCH1
is then driven with an error amplifier EAC until the volt-
age between BAT1 and CSN satisfies the error amplifier
or until GCH1 is clamped by the internal Zener diode.
The time required to close the switch could be quite long
(many ms) due to the small currents output by the error
amp and depending upon the size of the MOSFET switch.
If the voltage at CSN decreases below VBAT1 – 20mV, a
comparator CC quickly turns off the MOSFETs to prevent
reverse current from flowing in the switches. In essence,
this system performs as a low forward voltage diode.
Operation is identical for BAT2.
TO
BATTERY
1
FROM
CHARGER
BAT1
CSN
DCIN + 10V
(CHARGE PUMPED)
35mV
–
EAC
+
+
20mV
CC
–
OFF
GCH1
Q3
SCH1
10k
Q4
1960 F03
Figure 3. Charge MUX Switch Driver Equivalent Circuit
1960fb
15
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