LTC1960 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC1960' PDF : 28 Pages View PDF
LTC1960
OPERATION
Dual Charging
Note that the charge MUX switch drivers will operate
together to allow both batteries to be charged simultane-
ously. If both charge MUX switch drivers are enabled,
only the battery with the lowest voltage will be charged
until its voltage rises to equal the higher voltage battery.
The charge current will then share between the batteries
according to the capacity of each battery.
If both batteries are selected for charging, only batteries
with voltages above VCHMIN are allowed to charge. Dual
charging is not allowed when the low current mode of
the IDAC is selected. If dual charging is enabled when
the IDAC enters low current mode, then only BAT1 will
be charged.
Charger Start-Up
When the charger controller is enabled by the SPI Interface
block, the charger output CSN will ramp from 0V until it
exceeds the selected battery voltage. The clamp error amp
is used to prevent the charger output from exceeding the
selected battery voltage by more than 0.7V during the
start-up transient while the charge MUX switches, have
yet to close. Once the charge MUX switches have closed,
the clamp releases ITH to allow control by another loop.
PowerPath Controller
The PowerPath switches are turned on and off via the SPI
interface, in any combination. The external P-MOSFETs
are usually connected as an input switch and an output
switch. The output switch PFET is connected in series with
the input PFET and the positive side of the short-circuit
sensing resistor, RSC. The input switch is connected in
series between the power source and the output PFET.
The PowerPath switch driver equivalent circuit is shown
in Figure 4. The output PFET is driven high and low by the
output side driver controlling pin GXXO, the PFET is either
on or off. The gate of the input PFET is driven by an error
amplifier which monitors the voltage between the input
power source (BAT1 in this case) and SCP. If the switch
is turned off, the two outputs are driven to the higher of
the two voltages present across the input/output terminals
of the switch. When the switch is instructed to turn on,
the output side driver immediately drives the gate of the
output PFET approximately 6V below the highest of the
16
voltages present at the input/output. When the output
PFET turns on, the voltage at SCP will be pulled up to a
diode drop below the source voltage by the bulk diode of
the input PFET. If the source voltage is more than 25mV
above SCP, EAP will drive the gate of the input PFET low
until the input PFET turns on and reduces the voltage
across the input/output to the EAP set point, or until the
Zener clamp engages to limit the voltage applied to the
input PFET. If the source voltage drops more than 20mV
below SCP, then comparator CP turns on SWP to quickly
prevent large reverse current in the switch. This operation
mimics a diode with a low forward voltage drop.
20mV
OFF
–
CP
+
FROM
BATTERY
1
BAT1
SCP
–
EAP
+
25mV
OFF
SWP
GB1I
Q7
GB1O
Q8
Figure 4. PowerPath Driver Equivalent Circuit
RSC
TO
LOAD
CL
1960 F04
Autonomous PowerPath Switching
The LOPWR comparator monitors the voltage at the
load through the resistor divider from pin SCN. If any
POWER_BY bit is set and the LOPWR comparator trips,
then all of the switches are turned on (3-diode mode) by
the PowerPath controller to ensure that the system is
powered from the source with the highest voltage. The
PowerPath controller waits approximately 1 second, to
allow power to stabilize, and then reverts to the previous
PowerPath switch configuration. A power-fail counter is
incremented to indicate that a failure has occurred. If the
power-fail counter equals a value of 3, then the PowerPath
controller sets the switches to 3-diode mode and the PF
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