LTC5587IDD View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'LTC5587IDD' PDF : 20 Pages View PDF
LTC5587
APPLICATIONS INFORMATION
The RF input DC-blocking capacitor (C2) and CSQ bias
decoupling capacitor (C3), can be adjusted for low-fre-
quency operation. For input frequencies down to 10MHz,
0.01μF is needed at CSQ. For frequencies above 250MHz,
the on-chip 20pF decoupling capacitor is sufficient and
CSQ may be eliminated as desired. The DC-blocking ca-
pacitor can be as large as 2200pF for 10MHz operation
or 100pF for 2GHz operation. A DC-blocking capacitor
larger than 2200pF results in an undesirable RF pulse
response on the falling edge due to the rectifier action of
the diode limiter/ESD protection at the RF pin. Therefore,
the recommended value for C2 for general applications
is conservatively set at 1000pF.
RFIN
(MATCHED)
L1
C1
C3
0.01μF
VCC
6 CSQ
C2
1000pF
R1
68Ω
7 RF
205Ω
LTC5587
20pF
Filter Capacitor
The interface of the VOUT pin of the LTC5587 is shown in
Figure 5. It includes a push-pull output stage with a series
300Ω resistor. The detector output stage is capable of
sourcing and sinking 5mA of current. The VOUT pin can be
shorted to GND or VCC (or VDD whichever is lower) without
damage, but going beyond the VCC + 0.5V or VDD + 0.5V
and alternatively going beyond GND – 0.5V may result in
damage as the internal ESD protection diodes will start
to conduct excessive current.
VCC
40μA
LTC5587
INPUT
300Ω
VOUT 4
VDD
VOUT
FILTERED
CFILT
12-BIT ADC
S/H
5587 F03
Figure 3. Simplified Schematic of the RF Input Interface
6GHz
4GHz
3GHz
10MHz
500MHz
900MHz
1.8GHz
5587 F04
Figure 4. Input Reflection Coefficient
14
5587 F05
Figure 5. Simplified Schematic of the Detector Analog Output
The residual ripple due to RF modulation can be reduced
by adding an external capacitor, CFILT (C4 on evaluation
circuit schematic) to the VOUT pin to form a simple RC
lowpass filter. The internal 300Ω resistor in series with
the output pin enables filtering of the output signal with
just the addition of CFILT. The filter –3dB corner frequency,
fC, can be calculated with the following equation:
fC(–3dB) = 1/(2 • π • 300 • CFILT)
with fC in Hz and CFILT in F. Since the bandwidth of the
detected signal is effectively limited by the internal 150kHz
filter, a choice of CFILT = 1000pF sets the ADC –3dB input
bandwidth at 530kHz and does not affect the residual
modulation ripple much. CFILT has a small effect on ADC
sampling accuracy. For example, when the sample rate of
the ADC is changed from 25ksps to 500ksps, the output
value changes less than 0.2dB with any choice of CFILT.
5587f
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