M25P128
DC and AC parameters
Table 14. AC characteristics
Test conditions specified in Table 10 and Table 11
Symbol Alt.
Parameter
Min. Typ. Max. Unit
Clock Frequency for the following instructions:
fC
fC FAST_READ, PP, SE, BE, WREN, WRDI,
D.C.
RDID, RDSR, WRSR
50 MHz
fR
tCH(1)
tCL(1)
tCLCH(2)
tCHCL(2)
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tSHQZ(2)
tCLQV
tCLQX
tHLCH
tCHHH
tHHCH
tCHHL
tHHQX(2)
tHLQZ(2)
tWHSL(4)
tSHWL (4)
tVPPHSL(2)(5)
tCLH
tCLL
tCSS
tDSU
tDH
tCSH
tDIS
tV
tHO
tLZ
tHZ
Clock Frequency for READ instructions
Clock High Time
Clock Low Time
Clock Rise Time(3) (peak to peak)
Clock Fall Time(3) (peak to peak)
S Active Setup Time (relative to C)
S Not Active Hold Time (relative to C)
Data In Setup Time
Data In Hold Time
S Active Hold Time (relative to C)
S Not Active Setup Time (relative to C)
S Deselect Time
Output Disable Time
Clock Low to Output Valid
Output Hold Time
HOLD Setup Time (relative to C)
HOLD Hold Time (relative to C)
HOLD Setup Time (relative to C)
HOLD Hold Time (relative to C)
HOLD to Output Low-Z
HOLD to Output High-Z
Write Protect Setup Time
Write Protect Hold Time
Enhanced Program Supply Voltage High to
Chip Select Low
D.C.
9
9
0.1
0.1
5
5
2
5
5
5
100
0
5
5
5
5
20
100
200
20 MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
ns
tW
Write Status Register Cycle Time
Page Program Cycle Time (256 Bytes)
5
15 ms
2.5
tPP(6)
Page Program Cycle Time (n Bytes)
Page Program Cycle Time (VPP = VPPH) (256
Bytes)
2.5
7
ms
1.2(2)
Sector Erase Cycle Time
tSE
Sector Erase Cycle Time (VPP = VPPH)
2
6
s
1.6(2)
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