M25P128-VMF6PB View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
M25P128-VMF6PB
Numonyx -> Micron
'M25P128-VMF6PB' PDF : 45 Pages View PDF
DC and AC parameters
M25P128
Table 14. AC characteristics (continued)
Test conditions specified in Table 10 and Table 11
Symbol Alt.
Parameter
Min. Typ. Max. Unit
Bulk Erase Cycle Time
tBE
Bulk Erase Cycle Time (VPP = VPPH)
105
250 s
56(2)
1. tCH and tCL must be greater than or equal to 1/fC (max).
2. Value is guaranteed by characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for WRSR instruction when SRWD is set to 1.
5. VPPH should be kept at a valid level until the program or erase operation has completed and its result
(success or failure) is known.
6. Due to the Multi Level Cell technology, when using the Page Program (PP) instruction to program
consecutive Bytes, optimized timings are obtained with one sequence including all the Bytes versus
several sequences of only a few Bytes. If only a single byte is programmed, the estimated programming
time is close to the time needed to program a full page of 256 Bytes. Therefore, it is highly recommended
to use the Page Program (PP) instruction with a sequence of 256 consecutive Bytes. (1 ≤n ≤256)
Figure 20. Serial input timing
S
tCHSL
tSLCH
C
tDVCH
tCHDX
D
MSB IN
tSHSL
tCHSH
tSHCH
tCLCH
LSB IN
tCHCL
High Impedance
Q
AI01447C
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