Table 10. AC Measurement Conditions
Input Rise and Fall Times
≤ 10ns
Input Pulse Voltages
0.45V to 2.4V
Input Timing Ref. Voltages
0.8V and 2V
Output Timing Ref. Voltages
1.5V
Figure 10. AC Testing Input Output Waveform
2.4V
0.45V
1.5V
AI01950
M39208
Figure 11. Output AC Testing Load Circuit
VCC
IOL
DEVICE
UNDER
TEST
IOH
CL = 30pF
CL includes JIG capacitance
VOUT = 1.5V when the DEVICE
UNDER TEST is in the
Hi-Z output state.
AI02596B
Table 11. Capacitance (1) (TA = 25 °C, f = 1 MHz )
Symbol
Parameter
Test Condition
CIN
Input Capacitance
VIN = 0V
COUT
Output Capacitance
Note: 1. Sampled only, not 100% tested.
VOUT = 0V
Min
Max
Unit
6
pF
12
pF
Flash Sector Unprotection. Flash sectors can be
unprotected to allow updating of their contents.
Note that the Sector Unprotection unprotects all
sectors (sector 0 up to sector 7).
Flash Sector Unprotection is activated with a spe-
cific sequence of levels applied on EF, EE, G, A0,
A1, A6, A9, A12 and A15; this sequence includes a
verification of the Protection status on DQ0-DQ7
as shown in Figure 9 and Table 9.
This allows a guarantee of the retention of the
Protection status.
Remarks:
– The Verify operation is a read with a simulated
worst case conditions. This allows a guarantee
of the retention of the Protection status
– During the application life, the Sector protection
status can be accessed with a regular Read
instruction without "high voltage" VID on A9. This
instruction is detailed in Table 4.
Reset Instruction. The Reset instruction resets
the device internal logic in a few µs. Reset is an
instruction of either one write operation or three
write operations (refer to Table 4).
Supply Rails. Normal precautions must be taken
for supply voltage decoupling, each device in a
system should have the VCC rail decoupled with a
0.1µF capacitor close to the VCC and VSS pins. The
printed circuit board trace width should be sufficient
to carry the VCC program and erase currents re-
quired.
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