M41T81S View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M41T81S' PDF : 29 Pages View PDF
M41T81S
Clock operation
The IRQ/FT/OUT/SQW pin is an open drain output which requires a pull-up resistor to VCC
for proper operation. A 500-10k resistor is recommended in order to control the rise time.
The FT Bit is cleared on power-down.
Figure 11. Crystal accuracy across temperature
Frequency (ppm)
20
0
–20
–40
–60
–80
–100
–120
–140
–160
–40 –30 –20 –10 0
ΔF
F
=
K
x
(T
–
TO)2
K = –0.036 ppm/°C2 ± 0.006 ppm/°C2
TO = 25°C ± 5°C
10 20 30 40 50 60 70 80
Temperature °C
AI07888
Figure 12. Clock calibration
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION
AI00594B
Setting alarm clock registers
Note:
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41T81S is in the battery back-up mode to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode of operation. Table 3 on page 18 shows
the possible configurations. Codes not listed in the table default to the once per second
mode to quickly alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5-RPT1, the AF (Alarm Flag) is set. If AFE (Alarm Flag Enable) is also set
(and SQWE is '0.'), the alarm condition activates the IRQ/FT/OUT/SQW pin.
If the address pointer is allowed to increment to the Flags Register address, an alarm
condition will not cause the Interrupt/Flag to occur until the address pointer is moved to a
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