MFC2000 View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'MFC2000' PDF : 426 Pages View PDF
MFC2000 Multifunctional Peripheral Controller 2000
Hardware Description
Pin Name
SLCTOUT
PE
FAULTn
PIOD[7:0]
TESTER_MODE
ADCREFp
ADCREFn
POWER1
POWER2
ADGA
ADVA
ADGD
SDAA_SPKR
ADCV
SCIN
SENIN[2:0]
TCK
TMS
TRSTn
TDI
TDO
TEST
SCANMOD
P80_SEL
PLLREF_XIN
PLLREF_XOUT
PLLVDD
PLLVSS
SDDATA[15:0]
Table 3-1. Pin Description (4 of 6)
Pin No.
I/O
C3
O
B2
O
B1
O
D2,D1,C2,H4,H I/O
3,H2,H1,G4
J2
I
Y3
I
Y2
I
Y1
I
W4
I
Y5
-
V5
-
U5
-
V12
O
Y4
-
W5
I
V6,W6,Y6
I
W3
I
W2
I
W1
I
V4
I
V3
O
V2
I
J1
I
J3
I
Y15
I
W15
O
U15
-
U16
-
N20,P17,P18,P I/O
19,P20,R17,R1
8,R19,R20,T17,
T18,T19,T20,U1
7,U18,U19
Input
Type
-
-
-
H5VT
HD5VT
HD5VT
HU5VT
HD5VT
HU5VT
-
HD5VT
HD5VT
H3V
OSC
-
5VT
Output
Type
2XT3V
2XT3V
2XT3V
2XT5VT
-
-
-
-
-
1XT5VT
-
-
-
-
OSC
2XT5VT
Pin Description
PIO Returned status to PC
PIO Returned status to PC
PIO Returned status to PC (active low)
(Hysteresis) Driven by PC or MFC2000 and used
to send data or address depending on which mode
is used
(Hysteresis) For test only, It must be ‘low’ for the
normal operation
Positive reference voltage for the scan PADC
Negative reference voltage for the scan PADC
Voltage input for power-down detection circuit 1
Voltage input for power-down detection circuit 2
Scan PADC analog ground
Scan PADC analog Power
Scan PADC digital ground
Analog telephone line monitoring output from SSD
Scan PADC internal ground
Analog scan input signal
Analog sensor inputs for TADC
(Hysteresis, Pull down) Test clock input for JTAG.
It is positive edge-triggered.
(Hysteresis, Pull up) Test mode select input for
JTAG. Selects the next state in the TAP state
machine.
(Hysteresis, Pull down) Suggestion by Lauterbach
for JTAG: connect this signal to RESETn in normal
mode and disconnect in debug mode.
(Hysteresis, Pull up) Test data input for JTAG.
Serial data input to the JTAG shift register.
Test data output for JTAG. Serial data output from
the JTAG shift register.
(Hysteresis, Pull down) For test only, It must be
‘low’ for the normal operation.
(Hysteresis, Pull down) For the scan test only, It
must be ‘low’ for normal operations.
P80 DSP test and DFT scan mode select, This pin
is only used for the test mode.
Crystal input pin for PLL
Crystal output pin for PLL
+3.3V digital power for PLL
+3.3V digital ground for PLL
Countach (S)DRAM data bus (16 bits)
3-4
Conexant
100723A
Share Link: 
