ML2722DH View Datasheet(PDF) - Micro Linear Corporation
Part Name
Description
MFG CO.
'ML2722DH' PDF : 28 Pages View PDF
ML2722
CONTROL INTERFACES
There are two control interfaces: PARALLEL and SERIAL.
PARALLEL INTERFACE
The parallel interface provides immediate control and monitoring of the ML2722. Input signals include:
XCEN:
Transceiver enable. Places the ML2722 in Standby or Active (when asserted) modes.
RXON:
Receive On. Places an Active ML2722 in Receive mode when asserted.
REF:
Reference frequency input
Output signals include:
RSSI:
Received Signal Strength Indicator: indicates the power of the received signal
PAON:
External Power Amplifier Control Pin
SERIAL INTERFACE
A 3-wire serial interface (EN, DATA, CLK) is used for programming the ML2722 configuration registers, which control
device mode, pin functions, PLL and reference dividers, internal test modes, and filter alignment. Data words are
entered beginning with the MSB (“big-endian”). The word is divided into a leading 14-bit data field followed by a 2-bit
address field. When the address field has been decoded the destination register is loaded on the rising edge of EN.
Providing less than 16 bits of data will result in unpredictable behavior when EN goes high.
Data and clock signals are ignored when EN is high. When EN is low, data on the DATA pin is clocked into a shift
register by rising edges on the CLK pin. The information is latched when EN goes high. This serial interface bus is
similar to that commonly found on PLL devices. The data latches are implemented in static CMOS and use minimal
power when the bus is inactive. Table 3 and Figure 4 provide timing and register programming illustrations.
DS2722-F-06
FINAL DATASHEET
DECEMBER 2005 18
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