MPC5200B View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MPC5200B

SDRAM/DDR Memory Controller

Freescale Semiconductor 

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To reset the MPC5200B via the COP connector, the HRESET pin of the COP should be connected to the HRESET pin of the

MPC5200B. The circuitry shown in Figure 54 allows the COP to assert HRESET or JTAG_TRST separately, while any other

board sources can drive PORRESET.

PORRESET

COP Header

COP Connector

Physical Pinout

12

34

56

78

9 10

11 12

13 K Key

15 16

PORRESET

HRESET

13

11 SRESET

16

4 TRST

Key 14

9 TMS

12

7 TCK

6(2)

VDD

10Kohm

10Kohm

10Kohm

HRESET

VDD

VDD

SRESET

VDD

MPC5200B

10Kohm

10Kohm

JTAG_TRST

VDD

JTAG_TMS

VDD

JTAG_TCK

3 TDI

10Kohm

VDD

JTAG_TDI

CKSTP_OUT

15

1 TDO

5(3) halted NC

2(4) qack NC

10

NC

8

NC

TEST_SEL_0

JTAG_TDO

Figure 54. COP Connector Diagram

3.4.2.2 Boards Without COP Connector

If the JTAG interface is not used, JTAG_TRST should be tied to PORRESET, so that it is asserted when the system reset signal

(PORRESET) is asserted. This ensures that the JTAG scan chain is initialized during power on. Figure 55 shows the connection

of the JTAG interface without COP connector.

MPC5200B Data Sheet, Rev. 4

68

Freescale Semiconductor

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