4.4 Recommended operating conditions
Table 9. Recommended operating conditions (3.3 V)
Symbol
Parameter
Conditions
Value
Unit
Min
Max
VSS_HV
VDD_HV_A1
VDD_HV_B1
VSS_LV2
VRC_CTRL3
SR Digital ground on VSS_HV
pins
SR Voltage on VDD_HV_A pins
with respect to ground
(VSS_HV)
SR Voltage on VDD_HV_B pins
with respect to ground
(VSS_HV)
SR Voltage on VSS_LV (low
voltage digital supply) pins
with respect to ground
(VSS_HV)
Base control voltage for
external BCP68 NPN device
—
—
—
—
Relative to VDD_LV
0
0
V
3.0
3.6
V
3.0
3.6
V
VSS_HV 0.1 VSS_HV + 0.1
V
0
VDD_LV + 1
V
VSS_ADC
SR Voltage on VSS_HV_ADC0,
VSS_HV_ADC1 (ADC
—
VSS_HV 0.1 VSS_HV + 0.1
V
reference) pin with respect to
ground (VSS_HV)
VDD_HV_ADC04 SR Voltage on VDD_HV_ADC0
—
3.05
3.6
V
with respect to ground
(VSS_HV)
Relative to VDD_HV_A6 VDD_HV_A 0.1 VDD_HV_A + 0.1
VDD_HV_ADC17 SR Voltage on VDD_HV_ADC1
—
3.0
3.6
V
with respect to ground
(VSS_HV)
Relative to VDD_HV_A6 VDD_HV_A 0.1 VDD_HV_A + 0.1
VIN
SR Voltage on any GPIO pin with
—
VSS_HV 0.1
—
V
respect to ground (VSS_HV)
Relative to
—
VDD_HV_A/HV_B
VDD_HV_A/HV_B
+ 0.1
IINJPAD
SR Injected input current on any
—
pin during overload condition
5
5
mA
IINJSUM
SR Absolute sum of all injected
—
input currents during overload
condition
50
50
TVDD
SR VDD_HV_A slope to ensure
—
correct power up8
—
—
0.5
V/µs
0.5
—
V/min
TA
SR Ambient temperature under fCPU up to
bias
120 MHz 2%
–40
125
°C
TJ
SR Junction temperature under
—
bias
40
150
1 100 nF EMI capacitance and 10 µF bulk capacitance need to be provided between each VDD/VSS_HV pair.
MPC5646C Microcontroller Data Sheet, Rev. 3
42
Preliminary—Subject to Change Without Notice
Freescale Semiconductor