MPC5644B View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MPC5644B' PDF : 114 Pages View PDF
Table 10. Recommended operating conditions (5.0 V) (continued)
Symbol
Parameter
Conditions
Value
Unit
Min
Max
VIN
IINJPAD
SR Voltage on any GPIO pin with
respect to ground (VSS_HV)
SR Injected input current on any pin
during overload condition
—
Relative to
VDD_HV_A/HV_B
—
VSS_HV –0.1
—
–5
—
V
VDD_HV_A/HV_B
+ 0.1
5
mA
IINJSUM SR Absolute sum of all injected input
—
–50
50
currents during overload condition
TVDD
SR VDD_HV_A slope to ensure correct
—
power up8
—
—
0.5
V/µs
0.5
—
V/min
TA C-Grade Part SR Ambient temperature under bias
—
40
85
TJ C-Grade Part SR Junction temperature under bias
—
40
110
TA V-Grade Part SR Ambient temperature under bias
—
40
105
°C
TJ V-Grade Part SR Junction temperature under bias
—
40
130
TA M-Grade Part SR Ambient temperature under bias
—
40
125
TJ M-Grade Part SR Junction temperature under bias
—
40
150
1 100 nF EMI capacitance and 10 µF bulk capacitance needs to be provided between each VDD_HV_A/HV_B/VSS_HV
pair.
2 Full device operation is guaranteed by design from 3.0 V–5.5 V. OSC electrical characteristics (startup time, IDD,
negative resistance, ESR and duty cycle) will not be guaranteed to stay within the stated limits when operating below
4.5 V and above 3.6 V. However, OSC functionality is guaranteed within the entire range (3.0 V–5.5 V).
3 100 nF EMI capacitance and 40 µF bulk capacitance needs to be provided between each VDD_LV/VSS_LV supply
pair.
4 This voltage is internally generated by the device and no external voltage should be supplied.
5 100 nF capacitance needs to be provided between VDD_HV_(ADC0/ADC1)/VSS_HV_(ADC0/ADC1) pair.
6 Both the relative and the fixed conditions must be met. For instance: If VDD_HV_A is 5.9 V, VDD_HV_ADC0 maximum
value is 6.0 V then, despite the relative condition, the max value is VDD_HV_A + 0.3 = 6.2 V.
7 PA3, PA7, PA10, PA11 and PE12 ADC_1 channels are coming from VDD_HV_B domain hence VDD_HV_ADC1
should be within ±100 mV of VDD_HV_B when these channels are used for ADC_1.
8 Guaranteed by device validation.
NOTE
SRAM retention guaranteed to LVD levels.
MPC5646C Microcontroller Data Sheet, Rev. 3
44
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
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