MPC8349VVALF View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MPC8349VVALF

PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications

Freescale Semiconductor 

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Figure 27 provides the TRST timing diagram.

TRST

VM

VM

tTRST

VM = Midpoint Voltage (OVDD/2)

Figure 27. TRST Timing Diagram

Figure 28 provides the boundary-scan timing diagram.

JTAG

External Clock

VM

Boundary

Data Inputs

Boundary

Data Outputs

tJTKLDX

tJTKLDV

tJTDVKH

VM

Input

Data Valid

tJTDXKH

Output Data Valid

Boundary

Data Outputs

tJTKLDZ

Output Data Valid

VM = Midpoint Voltage (OVDD/2)

Figure 28. Boundary-Scan Timing Diagram

Figure 29 provides the test access port timing diagram.

JTAG

External Clock

VM

TDI, TMS

TDO

tJTKLOX

tJTKLOV

tJTIVKH

VM

Input

Data Valid

tJTIXKH

Output Data Valid

TDO

tJTKLOZ

Output Data Valid

VM = Midpoint Voltage (OVDD/2)

Figure 29. Test Access Port Timing Diagram

JTAG

MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

43

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