MPC8349VVALF View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MPC8349VVALF

PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications

Freescale Semiconductor 

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SPI

Figure 35 provides the AC test load for the SPI.

Output

Z0 = 50 Ω

RL = 50 Ω

OVDD/2

Figure 35. SPI AC Test Load

Figure 36 and Figure 37 represent the AC timings from Table 50. Note that although the specifications

generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge

is the active edge.

Figure 36 shows the SPI timings in slave mode (external clock).

SPICLK (Input)

Input Signals:

SPIMOSI

(See Note)

tNEIVKH

tNEIXKH

Output Signals:

SPIMISO

(See Note)

tNEKHOX

Note: The clock edge is selectable on SPI.

Figure 36. SPI AC Timing in Slave Mode (External Clock) Diagram

Figure 37 shows the SPI timings in master mode (internal clock).

SPICLK (Output)

Input Signals:

SPIMISO

(See Note)

tNIIVKH

tNIIXKH

Output Signals:

SPIMOSI

(See Note)

tNIKHOX

Note: The clock edge is selectable on SPI.

Figure 37. SPI AC Timing in Master Mode (Internal Clock) Diagram

MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

53

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