Package and Pin Listings
Table 51. MPC8349E (TBGA) Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Pins Reserved for Future DDR2
(They should be left unconnected for MPC8349E)
MODT[0:3]
AH3, AJ5, AH1, AJ4
—
MBA[2]
H4
—
SPARE1
AA1
—
SPARE2
AB1
—
Local Bus Controller Interface
LAD[0:31]
AM13, AP13, AL14, AM14, AN14, AP14,
I/O
AK15, AJ15, AM15, AN15, AP15, AM16,
AL16, AN16, AP16, AL17, AM17, AP17,
AK17, AP18, AL18, AM18, AN18, AP19,
AN19, AM19, AP20, AK19, AN20, AL20,
AP21, AN21
LDP[0]/CKSTOP_OUT
AM21
I/O
LDP[1]/CKSTOP_IN
AP22
I/O
LDP[2]
AN22
I/O
LDP[3]
AM22
I/O
LA[27:31]
AK21, AP23, AN23, AP24, AK22
O
LCS[0:3]
AN24, AL23, AP25, AN25
O
LWE[0:3]/LSDDQM[0:3]/LBS[0:3]
AK23, AP26, AL24, AM25
O
LBCTL
AN26
O
LALE
AK24
O
LGPL0/LSDA10/cfg_reset_source0
AP27
I/O
LGPL1/LSDWE/cfg_reset_source1
AL25
I/O
LGPL2/LSDRAS/LOE
AJ24
O
LGPL3/LSDCAS/cfg_reset_source2 AN27
I/O
LGPL4/LGTA/LUPWAIT/LPBSE
AP28
I/O
LGPL5/cfg_clkin_div
AL26
I/O
LCKE
AM27
O
LCLK[0:2]
AN28, AK26, AP29
O
LSYNC_OUT
AM12
O
LSYNC_IN
AJ10
I
General Purpose I/O Timers
GPIO1[0]/GTM1_TIN1/GTM2_TIN2
F24
I/O
Power
Supply
Notes
—
—
—
8
—
6
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
58
Freescale Semiconductor