MPC8541CPXAJD View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

MFG CO.

MPC8541CPXAJD

PowerQUICC™ III Integrated Communications Processor Hardware Specifications

Freescale Semiconductor 

Prev 31 32 33 34 35 36 37 38 39 40 Next

Internal launch/capture clock

T1

T3

LCLK

tLBKHKT

Local Bus

GPCM Mode Output Signals:

LCS[0:7]/LWE

UPM Mode Input Signal:

LUPWAIT

Input Signals:

LAD[0:31]/LDP[0:3]

(DLL Bypass Mode)

tLBKLOV1

tLBKLOX1

tLBIVKH2

tLBIVKH1

tLBIXKH2

tLBIXKH1

tLBKLOZ1

UPM Mode Output Signals:

LCS[0:7]/LBS[0:3]/LGPL[0:5]

Figure 20. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 2 (DLL Bypass Mode)

MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2

Freescale Semiconductor

39

Share Link: