Package and Pin Listings
Figure 39 shows the PCI input AC timing conditions.
CLK
Input
tPCIVKH
tPCIXKH
Figure 39. PCI Input AC Timing Measurement Conditions
Figure 40 shows the PCI output AC timing conditions.
CLK
tPCKHOV
Output Delay
High-Impedance
Output
tPCKHOZ
Figure 40. PCI Output AC Timing Measurement Condition
14 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions.
14.1 Package Parameters for the MPC8541E FC-PBGA
The package parameters are as provided in the following list. The package type is 29 mm × 29 mm, 783
flip chip plastic ball grid array (FC-PBGA).
Die size
8.7 mm × 9.3 mm × 0.75 mm
Package outline
29 mm × 29 mm
Interconnects
783
Pitch
1 mm
Minimum module height 3.07 mm
Maximum module height 3.75 mm
Solder Balls
62 Sn/36 Pb/2 Ag
Ball diameter (typical) 0.5 mm
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
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Freescale Semiconductor