MPC8541CPXAJD View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
MPC8541CPXAJD
Freescale Semiconductor
'MPC8541CPXAJD' PDF : 84 Pages View PDF
System Design Information
When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals
OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each
other in value. Then, Z0 = (RP + RN)/2.
OVDD
RN
Data
SW2
Pad
SW1
RP
OGND
Figure 50. Driver Impedance Measurement
The value of this resistance and the strength of the driver’s current source can be found by making two
measurements. First, the output voltage is measured while driving logic 1 without an external differential
termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured
while driving logic 1 with an external precision differential termination resistor of value Rterm. The
measured voltage is V2 = 1/(1/R1 + 1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm
× (V1/V2 – 1). The drive current is then Isource = V1/Rsource.
Table 50 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal OVDD, 105°C.
Table 50. Impedance Characteristics
Impedance
Local Bus, Ethernet, DUART, Control, Configuration, Power
Management
RN
RP
Differential
43 Target
43 Target
NA
Note: Nominal supply voltages. See Table 1, Tj = 105°C.
PCI DDR DRAM Symbol Unit
25 Target 20 Target
Z0
Ω
25 Target 20 Target
Z0
Ω
NA
NA
ZDIFF Ω
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
78
Freescale Semiconductor
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