1Semiconductor
PEDL66577-01
MSM66577 Family
Serial ports 4 and 5 (SIO4 and 5)
Master mode (Clock synchronous serial port)
MSM66577L (VDD = 2.4 to 3.6 V, Ta = –30 to +70°C)
MSM66Q577LY (VDD = 3.0 to 3.6 V, Ta = –30 to +70°C)
Parameter
Symbol
Condition
Min.
Max.
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
tcyc
fOSC = 14 MHz
71.4
—
tSCKC
5.6 tcyc
—
tSTMXS
5.6 tφ – 10
—
ns
tSTMXH
CL = 50 pF
4.2 tφ – 20
—
tSRMXS
21
—
tSRMXH
0
—
Note: tφ = tcyc/2
tcyc
CPUCLK
SIOCK
SDOUT
(SIOO)
SDIN
(SIOI)
tSCKC
tSTMXH
tSTMXS
tSRMXS
tSRMXH
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