1Semiconductor
PEDL66577-01
MSM66577 Family
Slave mode (Clock synchronous serial port)
MSM66577L (VDD = 2.4 to 3.6 V, Ta = –30 to +70°C)
MSM66Q577LY (VDD = 3.0 to 3.6 V, Ta = –30 to +70°C)
Parameter
Symbol
Condition
Min.
Max.
Unit
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
tcyc
fOSC = 14 MHz
71.4
—
tSCKC
5.6 tcyc
—
tSTMXS
2.8 tφ – 30
—
ns
tSTMXH
CL = 50 pF
5.6 tφ – 20
—
tSRMXS
21
—
tSRMXH
7
—
Note: tφ = tcyc/2
tcyc
CPUCLK
SIOCK
SDOUT
(SIOO)
SDIN
(SIOI)
tSTMXH
tSCKC
tSTMXS
tSRMXS
tSRMXH
Measurement points for AC timing (except the serial port)
VDD
0.44VDD 0.44VDD
0V
0.16VDD 0.16VDD
Measurement points for AC timing (the serial port)
VDD
0.8VDD
0V
0.2VDD
0.8VDD
0.2VDD
29/34