MSM82C59A-2JS View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
'MSM82C59A-2JS' PDF : 28 Pages View PDF
¡ Semiconductor
MSM82C59A-2RS/GS/JS
A0
D7
D6
D5
D4
D3
D2
D1
D0
ICW1 0
A7
A6
A5
1
LTIM ADI SNGL IC4
1: ICW4 required
0: ICW4 not required
1: Single
0: Cascade
CALL address interval
1: Interval = 4
0: Interval = 8
1: Level triggered mode
0: Edge triggered mode
Interrupt vector address
A5 thru A7
(Valid only in 85 mode)
A0
D7
D6
D5
D4
D3
D2
D1
D0
ICW2 1
A15/T7 A14/T6 A13/T5 A12/T4 A11/T3
A10
A9
A8
Interrupt vector address
A8 thru A15 (85 mode)
Interrupt vector address
T3 thru T7 (86 mode)
A0
D7
D6
D5
D4
D3
D2
D1
D0
ICW3
(Master)
1
S7
S6
S5
S4
S3
S2
S1
S0
1: IR input holds slave
0: IR input does not hold slave
A0
D7
D6
D5
D4
D3
D2
D1
D0
ICW3
(Slave)
1
0
0
0
0
0
ID2
ID1
ID0
Slave ID
01234567
01010101
00110011
00001111
NOTE: Slave ID indicates the IR input
of the corresponding master.
A0
D7
D6
D5
D4
D3
D2
D1
D0
ICW4 1
0
0
0
SFNM BUF M/S AEOI mPM
1: 86 mode
0: 85 mode
1: Automatic EOI mode
0: Normal EOI mode
0
¥ Non-buffered mode
NOTE: ¥ den 0 tes
1
0 Buffered mode (slave)
not specified
1
1 Buffered mode (master)
1: Special fully nested mode
0: Not special fully nested mode
Initialization Command Words (ICW1 thru ICW4)
16/28
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