MT46V2M32 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT46V2M32' PDF : 65 Pages View PDF
64Mb: x32
DDR SDRAM
TRUTH TABLE 2 – CKE
(Notes: 1-4)
CKEn-1 CKEn
L
L
L
H
H
L
H
H
CURRENT STATE
Power-Down
Self Refresh
Power-Down
Self Refresh
All Banks Idle
Bank(s) Active
All Banks Idle
COMMANDn
X
X
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
See Truth Table 3
ACTIONn
Maintain Power-Down
NOTES
Maintain Self Refresh
Exit Power-Down
Exit Self Refresh
5
Precharge Power-Down Entry
Active Power-Down Entry
Self Refresh Entry
NOTE:
1. CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn.
4. All states and sequences not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the tXSR period. A minimum of 200
clock cycles is needed before applying a READ command for the DLL to lock.
64Mb: x32 DDR SDRAM
2M32DDR-07.p65 – Rev. 12/01
36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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