256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Operations
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length bursts.
Figure 21: Random WRITE Cycles
T0
T1
T2
T3
CLK
COMMAND
WRITE
WRITE
WRITE
WRITE
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DIN
n
DIN
DIN
a
x
DIN
m
DON’T CARE
Note: Each WRITE command may be to any bank. DQM is LOW.
Figure 22: WRITE-to-READ
T0
T1
T2
T3
T4
T5
CLK
COMMAND
WRITE
NOP
READ
NOP
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL b
DQ
DIN
n
DIN
n+1
DOUT
b
DOUT
b+1
DON’T CARE
Note:
BL = 2. The WRITE command may be to any bank, and the READ command may be to any
bank. DQM is LOW. CL = 2 for illustration.
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
MT48H16M16LF_2.fm - Rev F 4/07 EN
32
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