MT48LC16M4A2 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC16M4A2' PDF : 55 Pages View PDF
T0
CLK
t CK
CKE
t CKS t CKH
t CMS tCMH
COMMAND
PRECHARGE
T1
NOP
DQM /
DQML, DQMH
A0-A9, A11
ALL BANKS
A10
SINGLE BANK
tAS tAH
BA0, BA1
BANK(S)
DQ High-Z
t RP
Precharge all
active banks
AUTO REFRESH MODE
T2
((
))
t CH
((
))
((
))
Tn + 1
t CL
64Mb: x4, x8, x16
SDRAM
To + 1
((
))
((
))
((
))
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
t RFC1
AUTO
REFRESH
((
))
NOP( ( NOP
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
((
))
t RFC1
ACTIVE
ROW
ROW
BANK
DON’T CARE
TIMING PARAMETERS
SYMBOL*
tAH
tAS
tCH
tCL
tCK(3)
tCK(2)
-6
-7E
-75
-8E
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
2.5
2.5
2.5
3
ns
2.5
2.5
2.5
3
ns
6
7
7.5
8
ns
–
7.5
10
10
ns
SYMBOL*
tCKH
tCKS
tCMH
tCMS
tRFC
tRP
-6
-7E
-75
-8E
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
60
66
66
70
ns
18
15
20
20
ns
*CAS latency indicated in parentheses.
NOTE: 1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not required.
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
39
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003, Micron Technology, Inc.
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