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MT48LC32M16A2P-7ELITC View Datasheet(PDF) - Micron Technology

Part Name
Description
MFG CO.
MT48LC32M16A2P-7ELITC
Micron
Micron Technology Micron
'MT48LC32M16A2P-7ELITC' PDF : 68 Pages View PDF
512Mb: x4, x8, x16 SDRAM
Operations
Table 9:
Truth Table 4 Current State Bank n, Command to Bank m
Notes 1–6 apply to entire table; notes appear below and on next page
Current State CS#
Any
H
L
Idle
X
Row
L
activating,
L
active, or
L
precharging
L
Read
L
(auto
L
precharge
L
disabled)
L
Write
L
(auto
L
precharge
L
disabled)
L
Read
L
(with auto
L
precharge)
L
L
Write
L
(with auto
L
precharge)
L
L
RAS#
X
H
X
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
CAS#
X
H
X
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
WE#
X
H
X
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
Command (Action)
COMMAND INHIBIT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command otherwise allowed to bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
Notes
7
7
7, 10
7, 11
9
7, 12
7, 13
9
7, 8, 14
7, 8, 15
9
7, 8, 16
7, 8, 17
9
Notes:
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH (see Table 7 on page 37) and
after tXSR has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted; that is, the current state
is for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
3. Current state definitions:
Idle:
Row active:
Read:
Write:
Read with auto
precharge enabled:
Write with auto
precharge enabled:
The bank has been precharged, and tRP has been met.
A row in the bank has been activated, and tRCD has been met. No data
bursts/accesses and no register accesses are in progress.
A READ burst has been initiated, with auto precharge disabled, and has
not yet terminated or been terminated.
A WRITE burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Starts with registration of a READ command with auto precharge
enabled, and ends when tRP has been met. After tRP is met, the bank
will be in the idle state.
Starts with registration of a WRITE command with auto precharge
enabled, and ends when tRP has been met. After tRP is met, the bank
will be in the idle state.
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
when all banks are idle.
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
40
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