MT48LC4M32B2B5-6AAT View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC4M32B2B5-6AAT' PDF : 79 Pages View PDF
128Mb: x32 SDRAM
WRITE Operation
Figure 31: Alternating Bank Write Accesses
T0
CLK
T1
tCK
tCKS tCKH
CKE
tCMS tCMH
Command
ACTIVE
NOP
DQM
Address
tAS tAH
Row
T2
tCL
tCH
WRITE
tCMS tCMH
Column m
T3
NOP
A10
BA0, BA1
tAS tAH
Row
tAS tAH
Bank 0
Enable auto precharge
Bank 0
tDS tDH
tDS tDH
DQ
DIN
DIN
tRCD - bank 0
tRAS - bank 0
tRC - bank 0
tRRD
T4
T5
T6
T7
T8
ACTIVE
NOP
WRITE
NOP
NOP
Row
Row
Column b
Enable auto precharge
Bank 1
tDS tDH
DIN
Bank 1
tDS tDH
tDS tDH
DIN
DIN
tWR - bank 0
tDS tDH
tDS tDH
DIN
DIN
tRP - bank 0
tRCD - bank 1
Note: 1. For this example, BL = 4.
T9
ACTIVE
Row
Row
Bank 0
tDS tDH
DIN
tRCD - bank 0
tWR - bank 1
Don’t Care
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. U 04/13 EN
57
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© 2001 Micron Technology, Inc. All rights reserved.
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