MT48LC4M32B2B5-7 View Datasheet(PDF) - Micron Technology

Part Name

Description

MFG CO.

MT48LC4M32B2B5-7

1 Meg x 32 x 4 Banks SDR SDRAM

Micron Technology 

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128Mb: x32 SDRAM

Electrical Specifications – AC Operating Conditions

Electrical Specifications – AC Operating Conditions

Table 12: Electrical Characteristics and Recommended AC Operating Conditions

Notes 1–6 apply to all parameters and conditions

Parameter

Access time from CLK (positive edge) CL = 3

CL = 2

CL = 1

Address hold time

Address setup time

CLK high-level width

CLK low-level width

Clock cycle time

CL = 3

CL = 2

CL = 1

CKE hold time

CKE setup time

CS#, RAS#, CAS#, WE#, DQM hold time

CS#, RAS#, CAS#, WE#, DQM setup time

Data-in hold time

Data-in setup time

Data-out High-Z time

CL = 3

CL = 2

CL = 1

Data-out Low-Z time

Data-out hold time

ACTIVE-to-PRECHARGE command

ACTIVE-to-ACTIVE command period

AUTO REFRESH period

ACTIVE-to-READ or WRITE delay

Refresh period (4096 rows)

Refresh period – automotive (4096 rows)

PRECHARGE command period

ACTIVE bank a to ACTIVE bank b command

Transition time

WRITE recovery time

Exit SELF REFRESH-to-ACTIVE command

Symbol

tAC(3)

tAC(2)

tAC(1)

tAH

tAS

tCH

tCL

tCK(3)

tCK(2)

tCK(1)

tCKH

tCKS

tCMH

tCMS

tDH

tDS

tHZ(3)

tHZ(2)

tHZ(1)

tLZ

tOH

tRAS

tRC

tRFC

tRCD

tREF

tREFAT

tRP

tRRD

tT

tWR

tXSR

-6A7

-6

-7

Min Max Min Max Min Max Unit

– 5.4 – 5.5 – 5.5 ns

– 7.5 – 7.5 –

8 ns

– 17 – 17 – 17 ns

0.8 – 1.0 –

1

– ns

1.5 – 1.5 –

2

– ns

2.5 – 2.5 – 2.75 – ns

2.5 – 2.5 – 2.75 – ns

6

–

6

–

7

– ns

10

– 107 –

10

–

ns

20

– 207 –

20

–

ns

0.8 – 1.0 –

1

– ns

1.5 – 1.5 –

2

– ns

0.8 – 1.0 –

1

– ns

1.5 – 1.5 –

2

– ns

0.8 – 1.0 –

1

– ns

1.5 – 1.5 –

2

– ns

– 5.4 – 5.5 – 5.5 ns

– 7.5 – 7.5 –

8 ns

– 17 – 17 – 17 ns

1

–

1

–

1

– ns

3

–

2

– 2.5 – ns

42 120,0 42 120,0 42 120,0 ns

00

00

00

60 – 60 – 70 – ns

60 – 60 – 70 – ns

18 – 18 – 20 – ns

– 64 – 64 – 64 ms

– 16 – 16 – 16 ms

18 – 18 – 20 – ns

12 – 12 – 15 – ns

0.3 1.2 0.3 1.2 0.3 1.2 ns

1

–

1

–

1

– tCK

CLK

CLK

CLK

+ 7ns

+ 6ns

+ 7ns

12 – 12 – 14 – ns

67 – 70 – 70 – ns

Notes

8

8

8

9

9

9

10

11

3

12

13

14

PDF: 09005aef80872800

128mb_x32_sdram.pdf - Rev. U 04/13 EN

20

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2001 Micron Technology, Inc. All rights reserved.

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