MT48LC4M32B2B5-7 View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC4M32B2B5-7' PDF : 79 Pages View PDF
128Mb: x32 SDRAM
Electrical Specifications – AC Operating Conditions
Table 13: AC Functional Characteristics
Notes 1–6 apply to all parameters and conditions
Parameter
Symbol
-6
-6A
-7 Unit Notes
READ/WRITE command to READ/WRITE command
tCCD
1
1
1
tCK
CKE to clock disable or power-down entry mode
tCKED
1
1
1
tCK 15
CKE to clock enable or power-down exit setup mode
tPED
1
1
1
tCK
DQM to input data delay
tDQD
0
0
0
tCK
DQM to data mask during WRITEs
tDQM
0
0
0
tCK
DQM to data High-Z during READs
tDQZ
2
2
2
tCK
WRITE command to input data delay
tDWD
0
0
0
tCK
Data-in to ACTIVE command
CL = 3
tDAL(3)
5
4
5
tCK 16
CL = 2
tDAL(2)
4
4
4
tCK 16
CL = 1
tDAL(1)
3
3
3
tCK 16
Data-in to PRECHARGE command
tDPL
3
3
3
tCK 17
Last data-in to burst STOP command
tBDL
1
1
1
tCK
Last data-in to new READ/WRITE command
tCDL
1
1
1
tCK
Last data-in to burst PRECHARGE command
tRDL
2
2
2
tCK 17
LOAD MODE REGISTER command to ACTIVE or REFRESH com-
tMRD
2
2
2
tCK
mand
Data-out to High-Z from PRECHARGE command
CL = 3
tROH(3)
3
3
3
tCK
CL = 2
tROH(2)
2
2
2
tCK
CL = 1
tROH(1)
1
1
1
Notes:
1. Minimum specifications are used only to indicate the cycle time at which proper opera-
tion over the full temperature range is ensured:
0˚C ≤ TA ≤ +70˚C (commercial)
–40˚C ≤ TA ≤ +85˚C (industrial)
–40˚C ≤ TA ≤ +105˚C (automotive)
2. Minimum specifications are used only to indicate the cycle time at which proper opera-
tion over the full temperature range is ensured for IT parts:
0˚C ≤ TA ≤ +70˚C
–40˚C ≤ TA ≤ +85˚C
3. An initial pause of 100μs is required after power-up, followed by two AUTO REFRESH
commands, before proper device operation is ensured. (VDD and VDDQ must be powered
up simultaneously. VSS and VSSQ must be at same potential.) The two AUTO REFRESH
command wake-ups should be repeated any time the tREF refresh requirement is excee-
ded.
4. AC characteristics assume tT = 1ns.
5. In addition to meeting the transition rate specification, the clock and CKE must transit
between VIH and VIL (or between VIL and VIH) in a monotonic manner.
6. tHZ defines the time at which the output achieves the open circuit condition; it is not a
reference to VOH or VOL. The last valid data element will meet tOH before going High-Z.
7. Not applicable for Revision G.
8. VIH overshoot: VIH,max = VDDQ + 1.2V for a pulse width ≤3ns, and the pulse width cannot
be greater than one third of the cycle rate. VIL undershoot: VIL,min = –1.2V for a pulse
width ≤3ns, and the pulse width cannot be greater than one third of the cycle rate.
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. U 04/13 EN
21
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