NBSG11
VEE NC NC VCC
16 15 14 13
Exposed Pad (EP)
VTCLK 1
CLK 2
CLK 3
VTCLK 4
NBSG11
12 Q0
11 Q0
10 Q1
9 Q1
5678
VEE NC NC VCC
Figure 1. QFN16 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
1
VTCLK
−
Internal 50 W Termination Pin. See Table 2.
2
CLK
ECL, CML,
Inverted Differential Input. Internal 75 kW to VEE and 36.5 kW to VCC.
LVCMOS, LVDS,
LVTTL Input
3
CLK
ECL, CML,
Noninverted Differential Input. Internal 75 kW to VEE.
LVCMOS, LVDS,
LVTTL Input
4
VTCLK
−
Internal 50 W Termination Pin. See Table 2.
5,16
VEE
6,7,14,15 NC
−
Negative Supply Voltage
−
No Connect
8,13
VCC
−
Positive Supply Voltage
9
Q1
RSECL Output
Inverted Differential Output 1. Typically Terminated with 50 W to VTT = VCC − 2.0 V.
10
Q1
RSECL Output
Noninverted Differential Output 1. Typically Terminated with 50 W to VTT = VCC − 2.0 V.
11
Q0
RSECL Output
Inverted Differential output 0. Typically Terminated with 50 W to VTT = VCC − 2.0 V.
12
Q0
RSECL Output
Noninverted Differential Output 0. Typically Terminated with 50 W to VTT = VCC − 2.0 V.
−
EP
−
The Exposed Pad (EP) on the QFN−16 package bottom is thermally connected to the die
for improved heat transfer out of package. The exposed pad must be attached to a heat−
sinking conduit. The pad is not electrically connected to the die but may be electrically
and thermally connected to VEE on the PC board.
1. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. The thermally exposed pad on package
bottom (see case drawing) must be attached to a heat−sinking conduit.
2. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage, and
if no signal is applied then the device will be susceptible to self−oscillation.
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