PCA9519 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCA9519' PDF : 18 Pages View PDF
NXP Semiconductors
PCA9519
4-channel level translating I2C-bus/SMBus repeater
6. Functional description
Refer to Figure 1 “Functional diagram of PCA9519”.
The PCA9519 enables I2C-bus or SMBus translation down to VCC(A) as low as 1.0 V
without degradation of system performance. The PCA9519 contains 8 bidirectional
open-drain buffers specifically designed to support up-translation/down-translation
between the low voltage and 3.3 V SMBus or 5 V I2C-bus. Port B I/Os are over-voltage
tolerant to 5.5 V even when the device is unpowered.
The PCA9519 includes a power-up circuit that keeps the output drivers turned off until
VCC(B) is above 2.5 V and the VCC(A) is above 0.8 V. VCC(B) and VCC(A) can be applied in
any sequence at power-up. After power-up and with the EN pin HIGH, a LOW level on the
port A (below approximately 0.15 V) turns the corresponding port B driver (either SDA or
SCL) on and drives the port B down to about 0 V. When port A rises above approximately
0.15 V, the port B pull-down driver is turned off and the external pull-up resistor pulls the
pin HIGH. When the port B falls first and goes below 0.3VCC(B), the port A driver is turned
on and the port A pulls down to 0.2 V (typical). The port B pull-down is not enabled unless
the port A voltage goes below VILc. If the port A low voltage goes below VILc, the port B
pull-down driver is enabled until the port A rises above approximately 0.15 V (VILc), then
the port B, if not externally driven LOW, will continue to rise being pulled up by the
external pull-up resistor.
Remark: Ground offset between the PCA9519 ground and the ground of devices on
port A of the PCA9519 must be avoided.
The reason for this cautionary remark is that a CMOS/NMOS open-drain capable of
sinking 3 mA of current at 0.4 V will have an output resistance of 133 or less (R = E / I).
Such a driver will share enough current with the port A output pull-down of the PCA9519
to be seen as a LOW as long as the ground offset is zero. If the ground offset is greater
than 0 V, then the driver resistance must be less. Since VILc can be as low as 90 mV at
cold temperatures and the low end of the current distribution, the maximum ground offset
should not exceed 50 mV.
Bus repeaters that use an output offset are not interoperable with port A of the PCA9519
as their output LOW levels will not be recognized by the PCA9519 as a LOW. If the
PCA9519 is placed in an application where the VIL of the port A of the PCA9519 does not
go below its VILc it will pull the port B LOW initially when the port A input transitions LOW
but port B will return HIGH, so it will not reproduce the port A input on port B. Such
applications should be avoided.
Port B is interoperable with all I2C-bus slaves, masters, and repeaters and includes the
50 ns glitch filter.
6.1 Enable
The EN pin is active HIGH and allows the user to select when the repeater is active. This
can be used to isolate a badly behaved slave on power-up until after the system power-up
reset. It should never change state during an I2C-bus operation because disabling during
a bus operation will hang the bus and enabling part way through a bus cycle could
confuse the I2C-bus parts being enabled.
PCA9519
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 January 2013
© NXP B.V. 2013. All rights reserved.
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