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PCF2129T View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
'PCF2129T' PDF : 73 Pages View PDF
NXP Semiconductors
PCF2129T
Accurate RTC with integrated quartz crystal for industrial
watchdog
timer value
n=1
MCU
n
WDTF
INT
001aag062
Counter reached 1, WDTF is logic 1, and an interrupt is generated.
Fig 17. WD_CD set logic 1: watchdog activates an interrupt when timed out
When the watchdog timer counter reaches 1, the watchdog timer flag WDTF (register
Control_2) is set logic 1
When a minute or second interrupt occurs, the minute/second flag MSF (register
Control_2) is set logic 1 (see Section 8.12.1).
8.10.4 Pre-defined timers: second and minute interrupt
PCF2129T has two pre-defined timers which are used to generate an interrupt either once
per second or once per minute. The pulse generator for the minute or second interrupt
operates from an internal 64 Hz clock. It is independent of the watchdog timer. Each of
these timers can be enabled by the bits SI (second interrupt) and MI (minute interrupt) in
register Control_1.
8.10.5 Clearing flags
The flags MSF, AF, and TSFx can be cleared by command. To prevent one flag being
overwritten while clearing another, a logic AND is performed during the write access. A
flag is cleared by writing logic 0 while a flag is not cleared by writing logic 1. Writing logic 1
will result in the flag value remaining unchanged.
Two examples are given for clearing the flags. Clearing a flag is made by a write
command:
Bits labeled with - must be written with their previous values
Bits labeled with T have to be written with logic 0
WDTF is read only and has to be written with logic 0
Repeatedly rewriting these bits has no influence on the functional behavior.
Table 34. Flag location in register Control_2
Register
Bit
7
6
5
4
3
2
1
0
Control_2
MSF WDTF TSF2 AF
T
-
-
T
PCF2129T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 12 February 2013
© NXP B.V. 2013. All rights reserved.
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