PCF7936AS View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'PCF7936AS' PDF : 33 Pages View PDF
NXP Semiconductors
Security Transponder (HITAG2)
Product Specification
PCF7936AS
7.7 LF Field Power On Reset
When the transponder enters a LF field a rectifier circuitry
becomes operational and the internal transponder supply
voltage (VDD) develops. As soon as the supply voltage
exceeds the LF Field Power-On Reset threshold voltage
(VTHR) the device performs a chip reset and starts its
initialization sequence, see Figure 23.
Subsequently, the transponder is muted and does not
respond to any command prior to termination of the
initialization sequence, tINIT. The startup time, tSTART,
depends on the basestation configuration, the resonance
circuit properties and the system coupling factor, however,
is small compared with the initialization time typically.
For proper device operation, after a LF Filed Power-On
Reset condition, command execution must commence
within the specified Idle time, tIDLE, see Figure 23.
Otherwise the device may stop command decoding,
disabling any communication with the device. In this case a
LF Field Power-On Reset has to be applied, in order to
reset and initialize the circuitry. Consequently, the device
would resume WAIT state. As indicated, the Idle time is
specified as the time interval following the initialization
sequence until the last bit of the Command Sequence that
is send to the transponder.
In case one of the Read Only modes is enabled, the device
enters READ ONLY state, if the first two bits of the
START_AUTH command are not being recognized within
the time-out period tWAIT,SA. In this case, Read Only
operation commences tWAIT,RO after termination of the
initialization sequence, tINIT, see Figure 23. For details refer
to section 7.5.
In order to force a LF Field Power-On Reset and proper
device initialization at any time, the LF field OFF condition
must be applied for at least tRESET,SETUP, in order to ensure
that the internal device supply voltage, VDD, drops below
the threshold voltage (VTHR), see Figure 24.
VTHR
VDD
LF field power on reset (POR)
threshold voltage
LF field applied
tSTART
tINIT
Figure 23. LF field power on reset timing
tIDLE
Command Sequence
t
tWAIT,SA
tWAIT,RO
READ ONLY Mode
t
VTHR
VDD
LF field power on reset (POR)
threshold voltage
LF field OFF
t
tRESET_SETUP
Figure 24. LF field power on reset setup timing
2010 May 04
24
CONFIDENTIAL
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