NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
CLK
tclk(H)
1/fclk
tclk(L)
0.7VDD
0.3VDD
SYNC
BP0 to BP3,
and S0 to S31
tPD(SYNC_N)
Fig 20. Driver timing waveforms
tSYNC_NL
tPD(drv)
tPD(SYNC_N)
0.7VDD
0.3VDD
0.5 V
(VDD = 5 V)
0.5 V
013aaa493
SDA
SCL
SDA
tBUF
tLOW
tHD;STA
tr
tHD;DAT
tSU;STA
Fig 21. I2C-bus timing waveforms
tf
tHIGH
tSU;DAT
tSU;STO
mga728
PCF8562
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 June 2011
© NXP B.V. 2011. All rights reserved.
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