PCF8813 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'PCF8813' PDF : 72 Pages View PDF
Philips Semiconductors
(67 + 1) × 102 pixels matrix LCD driver
Product speciï¬cation
PCF8813
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
tHD;DAT
tSU;STO
Cb
data hold time
0
−
set-up time for STOP condition
160
−
capacitive load for SDAH and
total capacitance of one −
−
SCLH lines
bus line
70
ns
−
ns
100
pF
capacitive load for SDAH + SDA
line and SCLH + SCL line
−
−
400
pF
tSP
tolerable spike width on bus
note 9
−
−
5
ns
Notes
1. fframe = f--e-n--x--t : (n depends on the multiplex rate, see Table 18).
2. VDD1 = 1.7 V to 3.3 V; VSS = 0 V; VLCD = 3.0 to 9.0 V; Tamb = −40 to +85 °C, all MUX settings.
3. VDD1 = 2.4 V to 3.0 V; Tamb = −20 °C to +70 °C; MUX = 68.
4. RES may be LOW before VDD on.
5. Maximum values are for fSCLK = 9 MHz. Series resistance includes ITO track + connector resistance + printed-circuit
board.
6. SDOUT disable time for SPI 3-line or 4-line interface.
7. SDOUT disable time for serial 3-line interface.
8. Typical conditions: VDD1 = 2.8 V, Tamb = 20 °C, MUX = 68; fframe = 70 ± 3.4 Hz.
9. Inputs SDAH and SCLH are filtered and will reject spikes on the bus lines with a width of less than tSW(max).
Table 18 Value of n as a function of multiplex rate
MULTIPLEX RATE
n
68
483
65
462
57
464
49
500
41
504
33
476
25
468
17
505
9
500
2004 Mar 05
42
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