As FFT data consists of real and imaginary parts, either
two PDSP1601As must be used (controlled by the same logic)
or a single PDSP1601/A could be used handling real and
imaginary data on alternate cycles (using the same
instructions for both cycles).
An example of an output normalisation circuit is shown in
Fig.8. Only 4 bit data paths are used in calculating the shift.
This means that we must be able to trap very small values
negative of GWR and force a 15-bit right shift in such cases.
PDSP16116/A/MC
N.B.
It is easier to simply add the word tag to the exponent for
the purpose of determing the shift required, instead of
modifying it according to Table.6. To compensate for this, the
Universal Exponent may be increased by one.
WTOUT
GWR
16-BIT DATA
sign bit
UNVERSAL
EXPONENT
4-BIT ADDER
4-BIT SUBTRACTOR
1111
4-BIT MUX
SV-PORT
B-PORT
PDSP1601
IS
C-PORT
ASRSV
NORMALISED OUTPUT DATA
Fig.9 Output Normalisation Circuitry
15