C3 SCSP Flash Memory
B.6
Device Geometry Definition
n
Table 27.
Device Geometry Definition
Offset
27h
28h
2Ah
Length
Description
1
“n” such that device size = 2n in number of bytes
2
Flash device interface: x8 async x16 async x8/x16 async
28:00,29:00 28:01,29:00 28:02,29:00
2
“n” such that maximum number of bytes in write buffer = 2n
Number of erase block regions within device:
1. x = 0 means no erase blocking; the device erases in “bulk”
2Ch
1
2. x specifies the number of device or partition regions with one or
more contiguous same-size erase blocks.
3. Symmetrically blocked partitions have one blocking region
4. Partition size = (total blocks) x (individual block size)
2Dh
4
Erase Block Region 1 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
31h
4
Erase Block Region 2 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
Code
See Table Below
27:
28:
--01
x16
29:
--00
2A:
--00
0
2B:
--00
2C:
--02
2
2D:
2E:
2F:
30:
31:
32:
33:
34:
26 Aug 2005
56
Intel® Advanced+ Boot Block Flash Memory (C3) SCSP Family
Order Number: 252636, Revision: 004
Datasheet