C3 SCSP Flash Memory
Address
27:
28:
29:
2A:
2B:
2C:
2D:
2E:
2F:
30:
31:
32:
33:
34:
Device Geometry Definition
16-Mbit
32-Mbit
–B
–T
–B
–T
--15
--15
--16
--16
--01
--01
--01
--01
--00
--00
--00
--00
--00
--00
--00
--00
--00
--00
--00
--00
--02
--02
--02
--02
--07
--1E
--07
--3E
--00
--00
--00
--00
--20
--00
--20
--00
--00
--01
--00
--01
--1E
--07
--3E
--07
--00
--00
--00
--00
--00
--20
--00
--20
--01
--00
--01
--00
B.7
Intel-Specific Extended Query Table
Certain flash features and commands are optional. The Intel-Specific Extended Query table
specifies this and other similar types of information.
Table 28. Primary-Vendor Specific Extended Query (Sheet 1 of 2)
Offset(1)
P = 35h
Length
Description
(Optional Flash Features and Commands)
(P+0)h
(P+1)h
(P+2)h
(P+3)h
(P+4)h
(P+5)h
(P+6)h
(P+7)h
(P+8)h
3
Primary extended query table
Unique ASCII string “PRI”
1
Major version number, ASCII
1
Minor version number, ASCII
4
Optional feature and command support (1=yes, 0=no)
bits 9–31 are reserved; undefined bits are “0.” If bit 31 is “1” then
another 31 bit field of optional features follows at the end of the bit-30
field.
bit 0 Chip erase supported
bit 1 Suspend erase supported
bit 2 Suspend program supported
bit 3 Legacy lock/unlock supported
Addr.
Hex
Code
35:
--50
36:
--52
37:
--49
38:
--31
39:
--30
3A:
--66
3B:
--00
3C:
--00
3D:
--00
bit 0 = 0
bit 1 = 1
bit 2 = 1
bit 3 = 0
Value
“P”
“R”
“I”
“1”
“0”
No
Yes
Yes
No
Datasheet
Intel® Advanced+ Boot Block Flash Memory (C3) SCSP Family
Order Number: 252636, Revision: 004
26 Aug 2005
57