PI7C7100 View Datasheet(PDF) - Pericom Semiconductor Corporation
Part Name
Description
MFG CO.
'PI7C7100' PDF : 132 Pages View PDF
ADVANCE INFORMATION
PI7C7100
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The instruction determines the test to be performed, the test data register to be accessed, or both. The IR is two bits wide.
When the IR is selected, the most significant bit is connected to TDI, and the least significant bit is connected to TDO.
The value presented on the TDI pin is shifted into the IR on each rising edge of TCK. The TAP controller captures fixed
parallel data (01 binary ). When a new instruction is shifted in through TDI, the value 01 (binary) is always shifted out through
TDO, least significant bit first. This helps identify instructions in a long chain of serial data from several devices.
Upon activation of the TRST# reset pin, the latched instruction asynchronously changes to the idcode instruction. When
the TAP controller moves into the test state other than by reset activation, the opcode changes as TDI shifts, and becomes
active on the falling edge of TCK.
15.2 Boundary-Scan Instruction Set
The PI7C7100 supports three mandatory boundary-scan instructions (bypass, sample/preload and extest). The table
shown below lists the PI7C7100’s boundary-scan instruction codes. The “reserved” code should not be used.
Instruction Code
(binary)
00
01
Instruction Name
extest
sample/preload
Instruction Code
(binary)
10
11
Instruction Name
reserved
bypass
Instruction /
Requisite
extest
IEEE 1149.1
Required
sample/
preload
IEEE 1149.1
Required
idcode
IEEE 1149.1
Optional
bypass
IEEE 1149.1
Required
Table 15-1. TAP Pins
Opcode
(binary)
Description
00 Extest initiates testing of external circuitry, typically board-level interconnects and off
chip circuitry. extest connects the boundary-scan register between TDI and TDO.
When Extest is selected, all output signal pin values are driven by values shifted into
the boundary-scan register and may change only on the falling edge of TCK. Also,
when extest is selected, all system input pin states must be loaded into the
boundary-scan register on the rising-edge of TCK.
01 Sample/preload performs two functions:
A snapshot of the sample instruction is captured on the rising edge of TCK without
interfering with normal operation. The instruction causes boundary-scan register
cells associated with outputs to sample the value being driven.
• On the falling edge of TCK the data held in the boundary-scan cells is transferred
to the slave register cells. Typically the slave latched data is applied to the system
outputs via the extest instruction.
10 Reserved
11 Bypass instruction selects the one-bit bypass register between TDI and TDO pins. 0
(binary) is the only instruction that accesses the bypass register. While this
instruction is in effect, all other test data registers have no effect on system
operation. Test data registers with both test and system functionality perform their
system functions when this instruction is selected.
73
09/18/00 Rev 1.1
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