PIC10LF320 View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC10LF320' PDF : 210 Pages View PDF
PIC10(L)F320/322
REGISTER 11-3: IOCAF: INTERRUPT-ON-CHANGE PORTA FLAG REGISTER
U-0
—
bit 7
U-0
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
—
IOCAF3
IOCAF2
IOCAF1
R/W-0/0
IOCAF0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
bit 7-4
bit 3-0
Note 1:
Unimplemented: Read as ‘0’.
IOCAF<3:0>: Interrupt-on-Change PORTA Flag bits
1 = An enable change was detected on the associated pin.
Set when IOCAPx = 1 and a rising edge was detected on RAx, or when IOCANx = 1 and a falling
edge was detected on RAx.( 1)
0 = No change was detected, or the user cleared the detected change.
Interrupt-on-change also requires that the IOCIE bit of the INTCON register be set (Register 6-1).
TABLE 11-1: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPT-ON-CHANGE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
40
IOCAF
—
—
—
—
IOCAF3 IOCAF2 IOCAF1 IOCAF0
76
IOCAN
—
—
—
—
IOCAN3 IOCAN2 IOCAN1 IOCAN0
75
IOCAP
—
—
—
—
IOCAP3 IOCAP2 IOCAP1 IOCAP0
75
TRISA
—
—
—
—
—(1) TRISA2 TRISA1 TRISA0
69
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Interrupt-on-Change.
Note 1: Unimplemented, read as ‘1’.
DS40001585D-page 76
2011-2015 Microchip Technology Inc.
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