EXAMPLE 7-4:
16 x 16 SIGNED
MULTIPLY ROUTINE
MOVFF
MULWF
MOVFF
MOVFF
;
MOVFF
MULWF
MOVFF
MOVFF
;
MOVFF
MULWF
MOVFF
ADDWF
MOVFF
ADDWFC
CLRF
ADDWFC
;
MOVFF
MULWF
MOVFF
ADDWF
MOVFF
ADDWFC
CLRF
ADDWFC
;
BTFSS
GOTO
MOVFF
SUBWF
MOVFF
SUBWFB
;
SIGN_ARG1
BTFSS
GOTO
MOVFF
SUBWF
MOVFF
SUBWFB
;
CONT_CODE
:
ARG1L, WREG
ARG2L
; ARG1L * ARG2L ->
; PRODH:PRODL
PRODH, RES1 ;
PRODL, RES0 ;
ARG1H, WREG
ARG2H
; ARG1H * ARG2H ->
; PRODH:PRODL
PRODH, RES3 ;
PRODL, RES2 ;
ARG1L, WREG
ARG2H
; ARG1L * ARG2H ->
; PRODH:PRODL
PRODL, WREG ;
RES1
; Add cross
PRODH, WREG ; products
RES2
;
WREG
;
RES3
;
ARG1H, WREG ;
ARG2L
; ARG1H * ARG2L ->
; PRODH:PRODL
PRODL, WREG ;
RES1
; Add cross
PRODH, WREG ; products
RES2
;
WREG
;
RES3
;
ARG2H, 7 ; ARG2H:ARG2L neg?
SIGN_ARG1 ; no, check ARG1
ARG1L, WREG ;
RES2
;
ARG1H, WREG ;
RES3
ARG1H, 7 ; ARG1H:ARG1L neg?
CONT_CODE ; no, done
ARG2L, WREG ;
RES2
;
ARG2H, WREG ;
RES3
PIC18F010/020
2001 Microchip Technology Inc.
Preliminary
DS41142A-page 57