PIC18F010/020
REGISTER 8-4: PIR2: PERIPHERAL INTERRUPT FLAG REGISTER2 (FA1h)
U-0
U-0
U-0
R/W-0
U-0
R/W-0
U-0
—
—
—
EEIF
—
LVDIF
—
bit 7
U-0
—
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
EEIF: EEPROM Write Timer Interrupt Flag bit
1 = Write complete
Unimplemented: Read as ‘0’
LVDIF: Low Voltage Detect Interrupt Flag bit
1 = The supply voltage has fallen below the specified LVD voltage (must be cleared in software)
0 = The supply voltage is greater than the specified LVD voltage
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
REGISTER 8-5:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER2 (FA0h)
U-0
U-0
U-0
R/W-0
U-0
R/W-0
U-0
—
—
—
EEIE
—
LVDIE
—
bit 7
U-0
—
bit 0
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
EEIE: EEPROM Write Timer Interrupt Enable bit
1 = Enables the EEPROM Write Timer interrupt
0 = Disables the EEPROM Write Timer interrupt
Unimplemented: Read as ‘0’
LVDIE: Low Voltage Detect Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS41142A-page 64
Preliminary
2001 Microchip Technology Inc.