ELAN 8X10
DATA SHEET
PMC-970109
ISSUE 3
PM3350 ELAN 8 X10
8 PORT ETHERNET SWITCH
This section is TBD.
Self Test and Error Reporting
The bootstrap firmware code is expected to implement any required power-on self-test
(POST) functions that are required by the system of which the ELAN 8x10 is a part. If
any of the POST routines detects an error, it is expected to halt the bootstrap process
and write a special code to the (optional) LED register that is mapped into the ELAN
8x10 memory address space. If the LED register is implemented, then the failure
indication can be obtained for diagnostic purposes.
Currently, two primary types of self-test routines are implemented:
1. A checksum is computed over the complete boot image and compared to the
pre-computed checksum in the boot image header. If a mismatch is detected,
then the boot image is considered to be corrupted, and cannot be used for
system initialization.
2. A destructive RAM test is performed over the entire RAM space with the
exception of the space occupied by the boot image itself. The RAM test is quite
simple, and consists of writing a known pseudo-random value to each location in
the RAM and then reading the data back. If the data read is not equal to that
written, then the RAM is considered to be defective, and the system cannot
begin operation. (The RAM self-test is not intended to be an exhaustive device
test aimed at unconditionally detecting a faulty RAM, but merely a fast and
simple test for a gross go/no-go check.)
Additional self-test routines will be implemented in the bootstrap firmware code as
developed.
In addition to the self-test functions performed upon system start-up, the ELAN 8x10
operating firmware also performs numerous checks of its internal state during normal
system operation. If an unrecoverable error is detected, the ELAN 8x10 will output a
status code to the LED register, and then attempt to restart itself (and possibly the
entire system) via the internal watchdog reset facility. If the internal watchdog reset
output (as driven onto the ERST* pin) is connected to the global system reset, then the
ELAN 8x10 will reset the entire system; otherwise, the ERST* pin should be monitored
by an external system master to determine when the ELAN 8x10 is halted due to some
fatal error, and must be reset in order to continue.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY
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