PM6670AS
Device description
Equation 7
CINT
>
gm
2π ⋅ ⎜⎛ fSW
⎝k
−
fZout
⎟⎞
⎠
⋅
Vr
Vout
where gm = 50 μs is the integrator trans conductance.
In order to ensure stability it must be also verified that:
Equation 8
CINT
>
gm
2π ⋅ fZout
⋅
Vr
VOUT
If the ripple on the COMP pin is greater than the integrator 150 mV, the auxiliary capacitor
CFILT can be added. If q is the desired attenuation factor of the output ripple, CFILT is given
by:
Equation 9
CFILT
=
CINT
⋅ (1− q)
q
In order to reduce the noise on the COMP pin, it is possible to add a resistor RINT that,
together with CINT and CFILT, becomes a low pass filter. The cutoff frequency fCUT must be
much greater (10 or more times) than the switching frequency:
Equation 10
RINT
=
2π ⋅ fCUT
1
⋅ CINT ⋅ CFILT
CINT + CFILT
If the ripple is very small (lower than approximately 20 mV), a different compensation
network, called “Virtual-ESR” Network, is needed. This additional circuit generates a
triangular ripple that is added to the output voltage ripple at the input of the integrator. The
complete control scheme is shown in Figure 30.
Doc ID 14436 Rev 2
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