Device description
PM6670AS
Figure 30. “Virtual-ESR” Network
T NODE
VOLTAGE
ΔV1
COMP PIN
VOLTAGE
VREF
ΔV2
t
t
COMP
RINT CINT
CFILT
T
R1
R
C
OUTPUT
VOLTAGE
ΔV
VSNS
ESR
COUT
I=gm(V1-Vr)
VREF
+
-
PWM
Comparator
gm
+ RFb1
Vr
V1
RFb2
t
The ripple on the COMP pin is the sum of the output voltage ripple and the triangular ripple
generated by the Virtual-ESR Network. In fact the Virtual-ESR Network behaves like a
another equivalent series resistor RVESR.
A good trade-off is to design the network in order to achieve an RVESR given by:
Equation 11
RVESR
=
VRIPPLE
ΔIL
− ESR
where ΔIL is the inductor current ripple and VRIPPLE is the total ripple at the T node, chosen
greater than approximately 20 mV.
The new closed-loop gain depends on CINT. In order to ensure stability it must be verified
that:
Equation 12
where:
CINT
>
gm
2π ⋅ fZ
⋅
Vr
Vout
Equation 13
and:
fZ
=
1
2π ⋅ Cout ⋅ RTOT
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Doc ID 14436 Rev 2