PSD813F1AV-12J View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
PSD813F1AV-12J
STMicroelectronics
'PSD813F1AV-12J' PDF : 110 Pages View PDF
PSD813F1V
Separate Space Modes
Code memory space is separated from data mem-
ory space. For example, the PSEN signal is used
to access the program code from the Flash Mem-
ory, while the RD signal is used to access data
from the EEPROM, SRAM and I/O Ports. This
configuration requires the VM register to be set to
0Ch. See Figure 12.
Combined Space Modes
The program and data memory spaces are com-
bined into one space that allows the main Flash
Memory, EEPROM, and SRAM to be accessed by
either PSEN or RD. For example, to configure the
main Flash memory in combined space mode, bits
2 and 4 of the VM register are set to “1” (see Figure
13).
Figure 12. 80C31 Memory Modes - Separate Space
DPLD
RS0
EES0-EES3
FS0-FS7
PSEN
RD
Flash
Memory
CS
OE
EEPROM
Memory
CS
OE
Figure 13. 80C31 Memory Mode - Combined Space
SRAM
CS
OE
AI09222
RD
VM REG BIT 3
VM REG BIT 4
PSEN
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
DPLD
RS0
EES0-EES3
FS0-FS7
Flash
Memory
CS
OE
EEPROM
Memory
CS
OE
SRAM
CS
OE
RD
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